The present invention relates to a method of driving a display apparatus in which the gradation scale is represented by a subfield structure. More particularly, the present invention relates to a method of driving a display apparatus such as a plasma display in which each subfield has at least an address period and a light period.
Description is made below with an example of a plasma display (simply referred to as a PDP hereinafter). The present invention, however, is not limited to a PDP but applicable to any type of display apparatus as long as the gradation scale is represented by a subfield structure and each subfield has at least an address period and a light period.
Since information about a PDP has been disclosed in, for example, Japanese Unexamined Patent Publication (Kokai) No. 7-271325, a detailed description is omitted here and only an outline of the structure and the driving method is given.
FIG. 1 is a block diagram that shows a structure of a display apparatus that uses a three-electrode type PDP 101. Address electrodes A1, . . . , Am of the PDP 101 are connected to an address driver 105, respectively, and address pulses are applied in the address period by the address driver 105. Y electrodes Y1, Y2, . . . , Yn are connected to a Y scan driver 102, respectively. A Y common driver 103 is connected to the Y scan driver 102. The Y scan driver 102 applies generated address pulses to the Y electrodes sequentially in the address period, and in the sustain discharge period, applies the sustain pulses generated in the Y common driver 103 to the Y electrodes in common. X electrodes are connected in common to all the display lines of the panel and sustain pulses are applied in common in the sustain period by an X common driver 104. These driver circuits are controlled by a control circuit 106. The control circuit 106 comprises a display data control portion 107 and a panel drive control portion 109. The display data control portion 107 expands the display data supplied from the outside on a frame memory 108, converts it into the data for the subfield structure to represent the gradation scale of PDP, and outputs it to the address driver 105. The panel drive control portion 109 generates control signals using the vertical sync. signals (VSYNC) and the horizontal synch. signals (HSYNC) and applies them to each portion.
FIG. 2 is a diagram that shows an example of drive waveforms of a PDP. These waveforms represent a subfield in the so-called “address/sustain period separated type-write address method.” In this example, a subfield comprises a reset period, an address period, and a sustain discharge period.
In the reset period, first, all the Y electrodes are set to 0 V level, and at the same time entire surface write pulses of Vs+Vw voltage are applied to the X electrodes, pulses of Vaw voltage are applied to the address electrodes and, thus, the reset discharge is caused to occur in all the cells regardless of the previous display conditions. Subsequently, the potential of the X electrodes and the address electrodes becomes 0 V, and discharge is caused to occur in all the cells because the voltage of the wall charges themselves exceeds the discharge start voltage. Because there is no difference in potential between electrodes, no wall charges are generated by these discharges, and the discharges end with the self-neutralization of space charges. This discharge is the so-called self-neutralization discharge. By this self-neutralization discharge, all the cells reach a uniform state without wall charges. This reset period acts so that all the cells reach an identical state regardless of the lighting conditions in the previous subfield, and contributes to the stable address discharge that follows.
In the next address period, address discharges are caused to occur line-sequentially in order to set each cell to a state in correspondence with the display data. First, scan pulses of −VY are applied to the Y electrodes and, in synchronization with this, address pulses of Va voltage are applied selectively to the address electrodes that correspond to the cells that will carry out sustain discharges, that is, those to be lit, in the address electrodes, then discharges are caused to occur between the address electrode and the Y electrode of the cell to be lit, and this serves as the priming (pilot) to cause discharge to occur immediately between the X electrode and the Y electrode. The former discharge is called “priming address discharge” and the latter, “main address discharge.” This causes the wall charges sufficient for the sustain discharge to accumulate on the X electrode and the Y electrode of the selected cell on the selected line.
Similar operations are carried out sequentially on the other display lines and the display data is written to the entire display lines.
In the next sustain discharge period, the sustain discharge pulses of Vs voltage (about 180 V) are applied to the X electrodes and the Y electrodes in turn to cause the sustain discharge to occur and the image display of a subfield is attained. In this “address/sustain period separated type-write address method,” the brightness of each subfield is determined by the number of sustain pulses to be applied in the sustain period, that is, the length of the sustain period.
The drive waveforms in FIG. 2 are only examples, and there are various other methods. For example, there is a method in which a pulse that changes gradually is applied to decrease the light emission due to the reset discharge so that the display contrast is improved, or another method in which wall charges are left uniformly in the reset period and address discharge is caused to occur in the cell that is not lit in the address period, and so on.
In the display apparatus that uses a PDP, a frame is composed of plural subfields and the subfields to be lit are combined for each cell to represent the gradation scale. FIG. 3 shows an example in which a frame is composed of the eight subfields SF1 through SF8. Each subfield comprises the reset period, the address period, and the sustain discharge period, respectively. There can be a case in which a difference appears in the total between the period of the display data supplied from the outside and that of all the subfields, and in such a case, a rest period is provided in the frame. For example, there are two methods for TV display, that is, the Vsync frequency can be 60 Hz or 50 Hz. If the plasma display apparatus is manufactured for 60 Hz and when the apparatus is used at 50 Hz, a rest period is provided to adjust the period of a frame. In this rest period, no display operation is performed and the length of the rest period is determined in accordance with the display data supplied from the outside. It may be a case where the length remains constant after being determined once, but there can be another case where the total number of pulses, that is, the sum of sustain pulses in all the cells in a frame, is controlled for power control, or another case where the number of the sustain pulses is adjusted in order to keep the brightness ratio among subfields constant regardless of the display load of each subfield, and so on, in other words, when the sustain period (light period) is varied, the length of the rest period is varied according to the display data. As described later, there may be a case where a reset period is not provided to some subfields to improve the display contrast or to abbreviate the reset period.
The brightness ratio among subfields is typically set to, for example, 1: 2: 4: 8: . . . , where each term is a power of 2, and this brightness ratio has advantages in that the largest number of levels of the gradation scale can be attained with a small number of subfields. For example, if there are four subfields, 16 levels of the gradation scale from 0 through 15 are available, if there are six subfields, 64 levels of the gradation scale from 0 through 63, and if there are eight subfields, 256 levels, from 0 through 255, are available.
When the gradation scale is attained by the subfield method in a display apparatus of “address/sustain period separated type-write address method”, the sustain periods where light emission takes place are separate from each other because an address period exists in each subfield, and a problem of the degradation of display quality such as flicker and color false contour is caused depending on the displayed image, because the lengths of the sustain periods are not equal. In Japanese Unexamined Patent Publication (Kokai) No. 3-145691, an art to suppress flicker has been disclosed, in which the most brightness-weighted subfield is arranged in the center and other subfields are arranged on both sides in order of brightness weight in the subfield structure of a frame, with the above-mentioned brightness ratio, each term of which is set to a power of 2. This art, however, cannot provide a sufficient quality of display.
Therefore, the present applicants have disclosed a driving method in which the disturbance of halftones is suppressed by providing plural subfields having a similar brightness and by combining the subfields to be lit adequately according to the level of the gradation scale.
Generally, it is known that it is a characteristic of human eyes to detect flicker with a frequency lower than 60 Hz. In the NTSC method, the Vsync frequency is 60 Hz, but it is 50 Hz in the PAL/SECAM methods employed in Europe, and so on. In a plasma display, images with a high quality are required even in operations with a frequency of 50 Hz. It was found that flicker is not a problem when the arts disclosed in the above-mentioned Japanese Unexamined Patent Publication (Kokai) No. 3-145691 and Japanese Unexamined Patent Publication (Kokai) No. 7-271325 are applied to the plasma display apparatus using the NTSC method to improve the quality of image, but in the case of the plasma display apparatus using the PAL method, flicker remains a problem even when the above-mentioned arts are applied. These phenomena are described with reference to FIG. 4. In FIG. 4A, the reset period and the address period are shown as a RESET & ADDRESS PERIOD of a single diagonal line cross-hatch although the portion of a single diagonal line cross-hatch designates the address period in FIG. 3A. This representation of FIG. 4A is used in later figures.
FIG. 4A shows an example of a frame structure in which the plural subfields having similar brightness disclosed in Japanese Unexamined Patent Publication No. 7-271325 are provided, and FIG. 4B shows the variation of the light emission intensity in the case of the frame structure in FIG. 4A, when driven at a frequency of 50 Hz. As shown in FIG. 4A, a total of 10 subfields, that is, subfields of 24, 16, 8, and 4 brightness weight in pairs, respectively, and subfields of 2 and 1 brightness weight each, respectively, are provided in the frame structure and they are arranged from both ends to the center in order of brightness weight by turns. As described above, light emission periods are separate from each other, because light is emitted in the sustain period in each subfield. If higher-harmonic waves are removed from the variation of the light emission intensity, the light emission intensity is high at both ends of the frame and low in the vicinity of the center, as shown in FIG. 4B. In the actual operation, these states are repeated, therefore, it is necessary to take the neighboring frames into account. In the neighboring frames also, the intensity is high at both ends, resulting in the light emission intensity being repeated with a frequency of 50 Hz.
FIG. 5 shows the resulting graph of the frequency analysis of the variation of the light emission intensity in the frame structure in FIG. 4. As shown in FIG. 5, the difference between the components of 0 Hz and 50 Hz visible to human eyes is small and the absolute value of the 50 Hz component is large. This means that the human eyes see the flicker of 50 Hz considerably when operating at a frequency of 50 Hz in a frame structure in which subfields are arranged as shown in FIG. 4.
FIG. 6A is a diagram that shows the frame structure disclosed in Japanese Unexamined Patent Publication (Kokai) No. 3-145691, and FIG. 6B is a diagram that shows the variation of the light emission intensity. In this case, the light emission brightness is high in the center and low on both sides of the frame. Therefore, the difference between the components of 0 Hz and 50 Hz is small and the absolute value of the 50 Hz component is large, similarly, resulting in a strong flicker at a frequency of 50 Hz.
As described above, the plasma display apparatus that operates at a frequency of 50 Hz generates a strong flicker and thus a problem in the image quality occurs.
Moreover, as shown in FIG. 3, when the plasma display apparatus is driven by the subfield method, a rest period is provided and the length of the rest period varies when the power is controlled or when the brightness ratio among subfields is maintained constant. As shown in FIG. 3, a rest period is provided at the end of the frame and when the rest period is lengthened, the position of the sustain period, that is the light emission period, of each subfield varies. The frame structure is determined in accordance with the display method, and it may be a case where the image quality is degraded if the position of the sustain period of each subfield varies. For example, when driven at a frequency of 50 Hz, a problem in that the intervals between the sustain periods of each subfield are narrowed, the frequency component of 50 Hz is increased and the image quality is degraded, is caused.
Among various items that relate to the image quality, the above-mentioned flicker and the degradation of the contour in animation are problems relating to the subfield method. The problem of the degradation of the contour in animation, for example, results in the color false contour, in which the contour of a moving part is colored, when animation is shown on the color display apparatus. The art disclosed in Japanese Unexamined Patent Publication No. 7-271325 suppresses the occurrence of color false contour, but if a plasma display apparatus to which this art is applied is driven at a frequency of 50 Hz, the problem of flicker occurs. It is thus found impossible to improve every item relating to the image quality with a limited number of subfields.